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RMCV19038BK1

发帖时间:2021-06-15 02:44:19

In 2006, nonvolatile SRAM supplier Simtek signed an expanded license and development agreement with Cypress. In May 2005, Simtek and Cypress (San Jose) agreed to jointly develop a 0.13-micron silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory process that would be utilized in future products from both companies.

Cisco appears to be one of the few companies delivering an ASIC-based product at this point. The Nexus 5000 uses as many as five ASICs, including multiple instances of two key chips, said Nuova's Malagrino. You need hardware to handle these transactions at line speeds.”

RMCV19038BK1

One main ASIC in the Cisco system is a port controller that acts as an Ethernet controller, handling packet buffering and virtual queuing for lossless traffic. The other is a nonblocking crossbar switch with an aggregate bandwidth of more than a terabit/ second and an integrated traffic scheduler.

The system also uses a supervisory unit based on an Intel CPU running a new operating system co-developed by Cisco and Nuova. That OS is a hybrid based on the storage operating system used in Cisco's first Fibre Channel switch and Cisco's classic IOS networking software.

All of the physical-layer definitions to make hardware compliant have been done in the standards groups,” said Malagrino. Most likely we will be able to claim [standards] compliance out of the gate [when the product ships in May], or, in the worst case, we will need a software upgrade.”

RMCV19038BK1

The T11 spec for FCoE will probably be completed by August, according to Recio. However, the IEEE work, which is defining a lossless version of Ethernet to be a more robust foundation for FCoE, still has a ways to go.

We saw that not enough progress was being made; we were stuck in a rut,” said Recio. So I called all these people in December, and we formed a new group, CEE Authors.”

RMCV19038BK1

That group–adopting the name Converged Enhanced Ethernet, which many have used for the lossless standard–hopes to complete proposals before the end of May in three specific areas. The proposals will then be submitted to the IEEE group.

Some vendors want to implement products based on the proposals as a Version 0” that they would upgrade later to the final standard set by the IEEE group.

The FM6124 features 32 Kbytes of FRAM memory that can be used to store event records. Up to 24 Kbytes of FRAM can be configured to store event/user data. The on-chip real-time clock (RTC) with calendar enables time stamping of events and can function as a system clock and calendar. The RTC enables further analysis of captured data, which can be used by the system to generate alerts such as an equipment malfunction or a call for maintenance.

The EDR includes 12 digital inputs that can be individually configured to trigger event recording on either a rising or falling edge. The FM6124's FRAM memory can store up to 4,000 event records. The device features an I²C interface that sustains communication speeds up to 100-kbit/s. The I²C interface allows for flexible placement of the FM6124 chip away from the host system and closer to the equipment and/or sensors it is monitoring. Up to four FM6124 devices can share the same I²C bus.

Pricing: Starts at $7.50 for quantities of 1,000.Availability: Samples are currently available in a RoHS-compliant 44-pin QFP package.Datasheet: Click here.

Ramtron International Corp., /www.ramtron.com

SAN JOSE, Calif. — With 2008 marking the 20th anniversary of the Embedded Systems Conference, ESC has become an industry essential.” The question is how its role might shift in the next 20 years as virtually all design becomes embedded design.

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