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发帖时间:2021-06-15 03:18:48

The company, which has gone through a three-year restructuring and is currently warding off a hostile takeover bid by AlliedSignal Inc., has already consolidated three of its major connector facilities in Great Britain, Gotz said.

Robert Frostholm, vice president of sales and marketing for Seeq, said the deal puts the Fremont-based company into some new and large markets.

By teaming up with SiS, we are able to plot a course to get (Seeq's intellectual-property) into the motherboard environment and open up new potential streams of revenue,'' Frostholm said.

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San Jose–Nov. 9, 1998–Altera Corp. (San Jose) began shipping version 9.1 of its Max+Plus IIprogrammable logic development software. Max+Plus II version 9.1 providesfull Year 2000 (Y2K) compliance and also adds programming support for newdevices such as Altera's recently announced EPM7064AE and EPF10K50EPLDs. Max+Plus II version 9.1 also supportsthe Jam Byte-Code format which accelerates ISP programming time by morethan 50 percent and compresses Jam files size by 30 percent.

Max+Plus II also provides programming and compilation support for two of thenewest devices offered by Altera, the EPM7064AE and the EPF10K50E, as well as all other Max and Flex family PLDs.Max+Plus II version 9.1 introduces support for the open-standard JamByte-Code Player and Compiler software for in-system programming (ISP) ofprogrammable logic devices using the Joint Test Action Group (JTAG)interface. The Jam Byte-Code Compiler compiles existing Jam files,including programming data and programming algorithms, into binary JamByte-Code files, thereby enabling smaller file sizes and shorter programmingtimes. Once created, a Jam Byte-Code file contains all the data andalgorithm information required to program a specific design into a targeteddevice.

The Max+Plus II version 9.1 development software is available now and willship to all customers on active maintenance. Max+Plus II version 9.1 isalso included in the new Altera tools subscription program.

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This subscription program, which was made available November 1,1998, simplifies the process for obtaining Altera development tools byconsolidating all software product and maintenance charges to a singleannual fee of $2,000.

Altera San Jose, CA www.altera.com

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Fishkill, N.Y.–Nov. 9, 1998–IBM (Fishkill) and Rambus, Inc. (Mountain View, Calif.) announced IBMhaslicensed the 800 MHz Direct Rambus ASIC Cell (RAC) for the company'sASIC core library. IBM plans to incorporate the memory businterface core into its Blue Logic family of ASIC libraries.

Using ARM Ltd.'s ARM 7, Triscend will create a 32-bit RISC controller with the same field configurability featured in its 8-bit products. Essentially, the field-configurable portion of Triscend chips allows users to implement standard peripheral devices, Triscend-designed coprocessors or customer-designed cores in an area of the die comprised of specialized programmable logic and tightly coupled to the CPU core.

Triscend selected Sharp as the best in a field of potential partners for 32-bit cores, said Christopher Balough, vice president of marketing for Triscend, based here. Triscend was attracted to Sharp's use of the ARM 7 in highly-integrated chips, with its penetration into the consumer and communications systems markets, and by Sharp's eagerness to work with the Triscend architecture, Balough said. Sharp has reportedly created a new design group, split between the United States and Japan, to work with Triscend and to apply the resulting chips.

Among numerous design wins for embedded ARM products, Sharp recently stated that it would supply a highly integrated ARM 7 TDMI processor — in a version that will lack the Triscend configurability — to the recently announced electronic book, called RocketBook, from NuvoMedia Inc. (Palo Alto, Calif.).

Taiwan's Silicon Integrated Systems Corp. (SIS) and Seeq Technology Inc. today announced that the two companies are working together to co-develop single-chip controllers for Fast Ethernet networks.

Under the terms of the deal, the two companies will co-develop a line of single-chip devices that combine SIS' Fast Ethernet controller technology and Seeq's 3.3-v, 10/100-Mbit/s physical-layer (PHY) chips.

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